Under chronic bilateral stimulation, what does each architecture choice cost in battery current and days? Numbers update as you change load, rails, and features. Detail lives behind the marks.
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Chronic mode assumed: BLE used to configure, then off.
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| Device | Mouse-scale | Reported current / runtime | Architecture |
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Two constraints are already settled and they close off the cheap answers. The protocol needs more than three days unattended, and the implant volume caps the cell at roughly 50–100 mAh — a LiPo in that class, not a bench battery. v8.1 draws ~3.4 mA while stimulating, which empties a 50 mAh LiPo in about 9.5 hours, and firmware optimization on v8.1 is exhausted: its ~1.5 mA sleep floor is structural, because the MCU sits downstream of a boost converter that can never be switched off. Neither "run what we have on a bigger battery" nor "fix the firmware" is available.
What stays open is which architecture replaces it. Five questions decide that, ordered so you can stop earliest. Two exits end in replicating a device that already exists rather than building one, and one forks the budget rather than closing it. Only one path runs all the way through, and that path is the proposal below.
What compliance do the electrodes actually demand?
Sweep battery current against load impedance at 1, 5, 10, 20, 30 and 50 kΩ, at the working amplitude. This is the single most informative measurement on the list, and a LiPo helps: it sits at 3.0–4.2 V, more headroom than a 2.8 V hearing-aid cell would have given.
ExitRoutinely above what the cell provides. A boost has to enter the stimulation path, and gate 2 asks what gating it would cost. Budget moves toward the 30–150 µA class, or to Pinnell's ~30 hours if the rail is simply left up.
Continue~3 V covers the working range, as STELLA found. Battery-direct is viable.
Can the analog chain settle inside the inter-pulse interval?
Datasheet enable times, to be confirmed on the bench. At 130 Hz the interval is 7.7 ms. The LT6020-1 enables in 100 µs typical and 120 µs over temperature; the AD5683 exits power-down in 6 µs so long as its internal reference stays off, since waking that reference costs 600 µs.
MeasureWith a boost in the path, this needs bench data rather than assertion. Timing is not the obstacle: the MAX17220 re-reads its output-select resistor on every startup, 600 µs typical and 1.32 ms worst case, and even the worst case fits inside 7.7 ms. Energy is the open question — the startup term alone is up to 200 µA for 600 µs at 130 Hz, about 16 µA averaged, before output-cap charging and conversion losses. Per-pulse gating may still beat holding the rail up for whole trains, so this branch forks the budget rather than closing it.
ContinueBattery-direct. One 100 µs amplifier enable covering both hemispheres' pulses is a 4.4% duty cycle, so the op amp averages ~10 µA rather than 190 µA.
Must parameters change while stimulation is running?
Set by the experimental design.
ExitYes, continuously. A live link is not milliamp-class by definition — at long connection intervals with small payloads BLE averages tens of µA — so the real variable is the latency the protocol demands. A slow supervisory link is compatible with chronic operation; interactive control at low latency is not, and that is acute mode rather than something to sell as chronic.
ContinueConfigure, then run untouched for days.
Unilateral and fixed, or bilateral and programmable?
Set by the experimental design.
ExitUnilateral, fixed parameters, monophasic with passive recharge. Grotemeyer and Fleischer published ~20 µA with far simpler circuitry. Replicate one of them; a third version of it is not a contribution.
ContinueBilateral, with amplitude programmable over BLE without recovering the animal.
Is arbitrary waveform shaping required at every pulse?
Set by the science, and worth challenging. Symmetry itself is not the expensive part — matched opposite-polarity phases can be produced by a duty-cycled source and polarity switching. What costs milliamps is holding precision analog continuously biased so that any shape can be produced on demand.
ExitYes — the shape must be arbitrary and settable pulse to pulse. That returns the continuously biased analog stack and the milliamp budget with it.
ContinueA shape fixed per configuration is acceptable, whether symmetric, asymmetric active, or passive recharge. Paulat runs asymmetric biphasic at 21 µA; STELLA is charge-balanced at 7.6 µA.
Clearing all five is what justifies v9: compliance the cell can supply directly, an analog chain that settles inside the interval, configure-then-run, bilateral and reprogrammable, and a waveform requirement that does not need continuously biased precision analog. That combination is not available off the shelf. Anything less has a cheaper answer above.
Build the chronic architecture — v8.1's platform, not its stimulator, is what empties the cell — but sweep electrode impedance before committing, because that one measurement decides whether stimulation can stay battery-direct.
Creed v8.1 is not emptied by the electrode. Raising programmed current from 60 to 400 µA added only 270 µA at the battery; the remaining ~3 mA is the platform — an MCU that does not truly sleep, always-on ±5 V rails, dual LT6020, DAC, and analog switches. That stack is a laboratory-quality source. The chronic mouse devices that last weeks (Paulat, STELLA, Grotemeyer, Fleischer) gave up some combination of high compliance, continuously biased analog, and a live radio.
Creed v9 should not try to maximize chronic runtime and real-time flexibility in one always-on architecture. The proposed chronic mode is the Paulat/STELLA class: battery-direct ~3 V, pulses scheduled by a low-frequency timer and shaped in hardware, a shared current source for bilateral delivery, asymmetric or passive recharge, BLE only to configure. Target 10–30 µA. Biphasic stimulation itself is not the milliamp problem — Paulat already generates an asymmetric biphasic waveform at 21 µA, and STELLA is charge-balanced at 7.6 µA. The expensive combination is high compliance plus continuously biased precision analog plus an awake MCU.
Everything below assumes the gates cleared. The one that can still redirect the design is the impedance sweep: if the electrodes need more headroom than the cell provides, a boost enters the stimulation path and the target moves toward the 30–150 µA class. How far depends on whether the converter can be gated per pulse or has to stay up for whole trains, which is a measurement rather than a foregone conclusion. The rest of the proposal — sleeping core, shared source, per-pulse analog, radio only for configuration — survives that change unaltered. Acute mode keeps the richer analog and a live BLE link; it simply stops being the default.
v9 is two operating states on one device, not one always-on stack. Chronic is the product. Acute is a mode that is allowed to cost milliamps. The default architecture to build first is battery-direct stimulation with hardware-sequenced pulse generation, a shared current source for bilateral delivery, and BLE only to configure.
| Chronic (v9 default) | Acute / interactive | |
|---|---|---|
| Budget | 10–30 µA average; months on a 50–100 mAh LiPo | A few mA; hours to days |
| Timing | RTC schedules, 1 MHz timer shapes, PPI drives the edges; core asleep | HF clocks and a running core allowed while the session is live |
| Compliance | Battery-direct from the cell; a boost only if Z demands it, gated per pulse or per train as the bench dictates | High rails allowed; never left on in chronic |
| Analog | Enabled ~100 µs before each pulse, shut down after; DAC woken per pulse | Precision Howland / continuous DAC permitted |
| Channels | Two hemispheres, one shared source, time-multiplexed | Independent drivers optional |
| Waveform | Constant-current; asymmetric active or passive recharge | Symmetric arbitrary biphasic optional |
| Radio | BLE to configure, then off. Magnet on/off. | Connected BLE for real-time control |
Core, not optional: constant-current, true biphasic capability, configure-and-run, hardware-timer stimulation, bilateral delivery. Not in the chronic budget: always-on ±5 V, continuously biased precision analog, heartbeat LED, real-time BLE, recording, or closed-loop. Those last two are a different product.
The analog chain mostly survives: the LT6020 has a shutdown pin, the AD5683 has a power-down mode, and the LT6656 is already sub-µA. None of that is exercised today because the parts are biased continuously. What does change is the MCU and the way the board is powered. v8.1's supply order is backwards — the boost converter is in the always-on path feeding the MCU, and nothing is in the gated path. v9 inverts it: no external converter in the always-on path at all, and a converter in the stimulation path only if gate 1 demands one.
| Function | v8.1 today | v9 direction | Chronic average |
|---|---|---|---|
| MCU + radio | BGM220S, fed battery → boost → LDO | nRF52840 on VDDH, taken straight off the LiPo. Its internal REG0/REG1 DC-DC stages do the regulating, so no external converter is needed to run the MCU | ~3.2 µA |
| Pulse timing | Firmware timing with the core awake | RTC on a 32.768 kHz LFXO schedules the period; a 1 MHz TIMER shapes the phases; PPI drives the edges so the core need not wake at all | ~0.2 µA |
| Board supply | MAX17220 boost always on, feeding MCU and analog | Deleted from the always-on path. Stimulation runs battery-direct; a boost returns only if gate 1 demands it, gated per pulse or per train depending on what the bench shows | 0 |
| Negative rail | MAX1853 −5 V, always on | Removed; polarity comes from the electrode switch | −165…320 µA |
| Current source | LT6020 dual + Howland, continuously biased | Same amplifier, enabled 100 µs ahead of the pulse pair and shut down between; Howland network scaled ~10× | ~9.8 µA |
| Amplitude | AD5683 DAC active, internal reference to be confirmed off | Same part, woken for 6 µs per hemisphere with the internal reference held off | ~5.6 µA |
| Reference | LT6656 1.25 V | Keep as-is; already sub-µA | <1 µA |
| Electrode routing | ADG1236 switch | Same part, doing polarity inversion and the passive-recharge short | negligible |
| Wake / on-off | DRV5032 Hall sensor | Keep at the lowest sample rate | ~0.5 µA |
| Indicator | LED + 1 kΩ, ~1.3–2.6 mA when lit | Dark in chronic; blink only on magnet query | 0 |
That totals roughly 20 µA of platform current at 130 Hz and 60 µs per phase, with the delivered charge adding another 2 µA at 100 µA per hemisphere — about 22 µA, which is what the explorer reports for the v9 preset. A 50 mAh LiPo then lasts around 66 days after a 70% derate, against 9.5 hours today. The 10–30 µA target holds, but the margin is thinner than a parts-only reading suggests, and the dominant term has moved: it is no longer the MCU or the rails but the amplifier enable window.
That matters because the 100 µs turn-on is a fixed cost per pulse, so this budget degrades close to linearly with stimulation frequency — ~9.8 µA for the op amp at 130 Hz, ~17.5 µA at 250 Hz. Three numbers must be measured before any of it is trustworthy: the Howland network's standing DC, whether the AD5683 internal reference is genuinely disabled, and how long the Howland output actually takes to settle into an electrode load, which the amplifier's enable spec does not cover.
The table above carries the LT6020 forward, but that line is a placeholder rather than a decision. Two things argue against reusing it. It is a dual, and a time-multiplexed v9 needs one channel, so roughly half of the 190 µA active draw is spent on an amplifier that never drives anything. It is also rail-to-rail on the output only: at a 3 V supply the input common-mode window is about 1.2–1.6 V, which is a 400 mV target for a Howland node that has to track the electrode as the LiPo falls from 4.2 to 3.0 V.
The higher-leverage move is upstream of the part number. Polarity in v9 comes from the ADG1236, so the source does not need to be bidirectional, and a Howland is a bidirectional topology. A low-side current sink — one amplifier, one FET, one sense resistor — puts the inputs a few hundred millivolts above ground instead of tracking the electrode. That removes the common-mode constraint entirely, removes the matched-resistor bridge, and removes the Howland standing DC that is currently one of the three numbers we have to go measure. In exchange, amplitude accuracy becomes a straightforward trade of amplifier offset against sense voltage, and sense voltage comes out of the compliance budget.
| Candidate | Active / shutdown | Supply | VOS max | Slew | Rail-to-rail | Analog term | 50 mAh life |
|---|---|---|---|---|---|---|---|
| LT6020-1 (dual, current) | 190 µA / 1.4 µA | 3–30 V | 30 µV | 5 V/µs | output only | ~9.8 µA | 66 d |
| LMV601 (single) | 107 µA / 45 pA | 2.7–5.5 V | 4 mV | 1 V/µs | output, input to V− | ~4.7 µA | 86 d |
| TLV2760 (single) | 20 µA / 10 nA | 1.8–3.6 V | 550 µV | 0.2 V/µs | input and output | ~0.9 µA | 111 d |
Which one wins depends on a rail decision that is still open. Battery-direct analog favors the LMV601: single channel, a genuine 45 pA shutdown, and about 2.2 V of input range at 3 V against the LT6020's 400 mV. Its 4 mV offset is the price — at a 100 mV sense that is 4% amplitude error, and holding 0.5% needs roughly 800 mV of sense voltage taken out of compliance. The TLV2760 is far better on power and offset, but its 3.6 V ceiling rules out a raw LiPo; it only works if the analog runs from a regulated rail, which the nRF52840 can supply from VDDH through REGOUT0 without adding an external converter. That also fixes compliance at a constant value instead of letting it sag across the discharge curve, at the cost of peak headroom.
Two things to settle before committing. Neither datasheet specifies turn-on time from shutdown, and since the LT6020's 100 µs is 29% of its on-window, that single number could invert the ranking above — a TLV2760 that takes 500 µs to wake gives back its entire advantage. Second, the 0.2 V/µs slew needs checking against the real electrode load, since establishing a 2 V swing would consume about 10 µs of a 60 µs phase. Worth a look in the same pass: the DAC63001 collapses DAC, reference and current source into one part, though a ±250 µA maximum and a VDD − 400 mV compliance limit likely put it below the range v8.1 already covers.
Datasheets: LT6020 / LT6020-1 · LMV601 · TLV2760 · DAC63001
The chronic budget rests on the claim that the device can wake, stimulate and shut down inside 7.7 ms without the core ever running. These are the figures that claim depends on, taken from the nRF52840, LT6020-1, AD5683 and MAX17220 datasheets.
| Parameter | Value | What it constrains | |
|---|---|---|---|
| LFXO period / RTC resolution | 30.5 µs, ±15 µs task jitter | Fine for the 7.7 ms period, to about 0.4%. Cannot define a 60 µs phase — that is two ticks with ±25% error. The LF clock schedules pulses; it does not shape them. | |
| TIMER at 1 MHz | 1 µs steps, 3–8 µA | Shapes the phase edges. Runs only inside the pulse window, so its cost is the duty cycle, not the run current. | |
| Internal 64 MHz RC accuracy | ±1.5% typical | Enough for pulse width, and both phases share the same clock, so charge balance is unaffected by the error. No crystal is needed to stimulate. | |
| HFXO startup | 304–328 µs | Too slow to start per pulse at 130 Hz. Reserved for BLE, which is the only thing that needs the crystal. | |
| Idle → CPU executing | 3.0 µs | Cheap enough that waking per pulse is an option, though PPI makes it unnecessary. System OFF costs 16.5 µs and a reset, so the device stays in System ON. | |
| LT6020-1 enable | 100 µs typ, 120 µs over temp | The dominant analog cost and the pacing item for the whole pulse sequence. Fixed per pulse, so it scales with frequency. | |
| AD5683 exit power-down | 6 µs | Cheap enough to wake every pulse — but only with the internal reference off. Waking that reference costs 600 µs and would dominate everything else. | |
| MAX17220 startup | 600 µs typ, 1320 µs max, up to 200 µA | It re-reads its output-select resistor on every startup, so the delay is paid again every time. Even the worst case fits inside 7.7 ms — the cost, not the timing, is what argues against per-pulse boost gating: roughly 16 µA averaged from the startup term alone, before output-cap charging and conversion losses. | |
The sequence that falls out: the RTC fires, PPI starts the 1 MHz timer and asserts the amplifier enable, the DAC wakes and is loaded, the timer clocks the phases and recharge for one hemisphere, the electrode switch re-routes and the second hemisphere follows, then everything is shut down again — about 340 µs of activity in a 7,700 µs interval, with the core asleep throughout. The two assumptions most likely to break it are the cost of boost startup, which is why battery-direct is the default, and the real settling time of the current source into a capacitive electrode. Both are bench measurements rather than datasheet numbers.
One current source serving two hemispheres is the choice most likely to draw an objection, so it is worth being precise about what the offset is. A single enable window covers the pair: the left electrode receives its biphasic pulse, the switch re-routes, the right receives its own. The second hemisphere lags the first by about 120 µs, and the entire bilateral sequence occupies 340 µs of a 7,700 µs interval. Put that next to the timescales that could plausibly care.
| Timescale | Duration | Relative to the offset | |
|---|---|---|---|
| v9 interhemispheric offset | ~120 µs | The quantity in question | |
| Large myelinated axon, strength–duration constant | 30–200 µs | Comparable — but the two hemispheres are millimetres apart in separate tissue, so no membrane integrates both fields | |
| Cell body and dendrite chronaxie | 1–10 ms | 8–80× longer | |
| Clinical interleaving offset (180° at 130 Hz) | 3.8 ms | 32× longer, and routine in commercial bilateral IPGs | |
| Pulse period at 130 Hz | 7.7 ms | 64× longer | |
| Transcallosal conduction delay | ~15 ms | 125× longer — the fastest route by which one hemisphere can influence the other | |
The clinical precedent is the strongest part of the argument, because bilateral IPGs already work this way. Commercial systems execute their stimulation configurations sequentially rather than concurrently, in what Medtronic calls interleaving; Boston Scientific's architecture assigns explicit timing channels to the other side of the brain at 180° phase, and describes interleaving pulses of the same frequency as the mechanism that prevents overlap. A standard clinical bilateral offset is therefore half a period — 3.8 ms at 130 Hz — roughly thirty times larger than what v9 proposes, delivered to human patients for years.
The biophysics points the same way. DBS acts primarily on large myelinated axons, whose strength–duration time constant is 30–200 µs; that is why clinical pulse widths sit at 60–150 µs in the first place. Those constants describe how a single element integrates a single local field, and the two hemispheres present separate elements in separate tissue with no shared membrane to sum across. The earliest either side can learn about the other is transcallosal, near 15 ms. Against that, 120 µs is simultaneity.
Simultaneous delivery is in fact the harder engineering case, not the safer one. Driving two electrode pairs at once from one battery opens a return path through the common reference, and Medtronic's patent on concurrent dual-site stimulation exists specifically to float one output stage during the pulse and suppress the resulting crosstalk. Sequencing removes that failure mode by construction: one hemisphere is connected at a time, each pulse sees a defined load, and the idle side can be held shorted for passive recharge while the other is driven. Charge balance stays a per-hemisphere property and is unaffected.
The claim has a boundary worth stating. If a protocol ever needs genuinely coincident bilateral pulses — phase-locked interhemispheric stimulation, for instance — a shared source cannot deliver it, and the answer is independent drivers rather than a reassurance that the offset is small. For chronic open-loop DBS at a fixed rate no such requirement exists, and the explorer will price the independent option if you want to see it: about 26 µA against 22, since the saving is the shared enable rather than the delivery time. Paulat's t-IPG already runs its two channels delayed rather than coincident, with ≥49 days in vivo.
Sources: Systems for deep brain stimulation: review of technical features · Identification of the target neuronal elements in electrical DBS · Asymmetric transcallosal conduction delay · Medtronic US6125300 · Boston Scientific US11207521
Most of v9 is deliberately not new. The parts worth defending are the ones that no device in the comparison set does together.
| Element | Where it comes from |
|---|---|
| LF-timer pulse generation with the core asleep | STELLA — 32.768 kHz timing, 7.6 µA at 3.1 V |
| Compliance sized to the measured load | STELLA — ~2.2–2.8 V because that is what the electrodes needed |
| Asymmetric active recharge on a direct ~3 V rail | Paulat — 21.3 µA, two channels, no permanent radio |
| Passive recharge as the low-power floor | Grotemeyer and Fleischer — ~20 µA with simple circuitry |
| Magnet on/off and configure-then-run | Fleischer, Grotemeyer, de Haas, Pinnell |
| Pulse-gated rather than always-on high compliance | Inverse of Pinnell — the fixed 12 V rail is what costs the runtime |
| Constant-current Howland, DAC and precision reference, electrode switching | Creed v8.1 — retained, not redesigned |
| SoC regulating itself from the raw cell, no external converter always on | Standard nRF52840 practice — VDDH accepts 3.0–4.2 V directly. New to Creed, which currently does the opposite |
| Full BLE reconfiguration with a tens-of-µA chronic floor | Novel here. Paulat uses a near-field programmer, STELLA external control, Grotemeyer and Fleischer are preprogrammed |
| Bilateral delivery at that floor from one time-multiplexed source | Novel here. Grotemeyer, Fleischer, Alpaugh and Kouzani are unilateral |
| Compliance chosen per animal from measured impedance | Novel here. Others fix the rail at design time, low or high |
| One board with two formal operating states | Novel here. The alternative is a chronic product and an acute product |
Sources: architecture review and v8.1 current-consumption notes.